Al 2 O 3 Layers Grown by Atomic Layer Deposition as Gate Insulator in 3C-SiC MOS Devices.

Metal-oxide-semiconductor (MOS) capacitors with Al 2 O 3 as a gate insulator are fabricated on cubic silicon carbide (3C-SiC). Al 2 O 3 is deposited both by thermal and plasma-enhanced Atomic Layer Deposition (ALD) on a thermally grown 5 nm SiO 2 interlayer to improve the ALD nucleation and guarantee a better band offset with the SiC. The deposited Al 2 O 3 /SiO 2 stacks show lower negative shifts of the flat band voltage V FB (in the range of about -3 V) compared with the conventional single SiO 2 layer (in the range of -9 V). This lower negative shift is due to the combined effect of the Al 2 O 3 higher permittivity (ε = 8) and to the reduced amount of carbon defects generated during the short thermal oxidation process for the thin SiO 2 . Moreover, the comparison between thermal and plasma-enhanced ALD suggests that this latter approach produces Al 2 O 3 layers possessing better insulating behavior in terms of distribution of the leakage current breakdown. In fact, despite both possessing a breakdown voltage of 26 V, the T-ALD Al 2 O 3 sample is characterised by a higher current density starting from 15 V. This can be attributable to the slightly inferior quality (in terms of density and defects) of Al 2 O 3 obtained by the thermal approach and, which also explains its non-uniform dC/dV distribution arising by SCM maps.