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A Brain-Spinal Interface (BSI) System-on-Chip (SoC) for Closed-Loop Cortically-Controlled Intraspinal Microstimulation.

Shahab ShahdoostShawn B FrostDavid J GuggenmosJordan BorrellCaleb DunhamScott BarbayRandolph J NudoPedram Mohseni
Published in: Analog integrated circuits and signal processing (2018)
This paper reports on a fully miniaturized brain-spinal interface (BSI) system for closed-loop cortically-controlled intraspinal microstimulation (ISMS). Fabricated in AMS 0.35μm two-poly four-metal complementary metal-oxide-semiconductor (CMOS) technology, this system-on-chip (SoC) measures ~ 3.46mm × 3.46mm and incorporates two identical 4-channel modules, each comprising a spike-recording front-end, embedded digital signal processing (DSP) unit, and programmable stimulating back-end. The DSP unit is capable of generating multichannel trigger signals for a wide array of ISMS triggering patterns based on real-time discrimination of a programmable number of intracortical neural spikes within a pre-specified time-bin duration via thresholding and user-adjustable time-amplitude windowing. The system is validated experimentally using an anesthetized rat model of a spinal cord contusion injury at the T8 level. Multichannel neural spikes are recorded from the cerebral cortex and converted in real time into electrical stimuli delivered to the lumbar spinal cord below the level of the injury, resulting in distinct patterns of hindlimb muscle activation.
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