Numerical Study on the Laser Annealing of Silicon Used in Advanced V-NAND Device.

Laser melt annealing of amorphous silicon (a-Si) and subsequent recrystallization of a-Si are essential processes for successfully implementing vertical NAND (V-NAND) flash memory devices developed based on the cell-over-periphery (COP) structure. The aim of this study was to develop the numerical model for the laser melting process of a-Si used in V-NAND COP structure. In this study, the numerical simulation predicting the temperature distribution induced by multipath laser scanning and beam overlapping was conducted. In particular, the temperature uniformity and melt duration issues, which are critical in practical laser melt annealing applications in semiconductor fabrication, were discussed based on the simulated temperature distribution results. According to the simulation results, it was found that the annealed surface was subjected to rapid heating and cooling. The heating and cooling rates after temperature stabilization were 4.7 × 10 7 K/s and 2.04 × 10 7 K/s, respectively. The surface temperature increased with time and beam overlap ratio owing to the preheating effect and increasing heat accumulation per unit area. Under the process conditions used in the simulation, the temperature in a-Si was far above its melting point (1440 K), which numerically indicated full melting of the a-Si layer. Temperature uniformity within the annealed area was significantly improved when an overlap ratio of 50% was used. It was also found that using an overlap ratio of 50% increased the melt duration by 29.8% compared with an overlap ratio of 25%.