Novel Modeling Approach to Analyze Threshold Voltage Variability in Short Gate-Length (15-22 nm) Nanowire FETs with Various Channel Diameters.

In this study, threshold voltage ( V th ) variability was investigated in silicon nanowire field-effect transistors (SNWFETs) with short gate-lengths of 15-22 nm and various channel diameters ( D NW ) of 7, 9, and 12 nm. Linear slope and nonzero y-intercept were observed in a Pelgrom plot of the standard deviation of V th (σ V th ), which originated from random and process variations. Interestingly, the slope and y-intercept differed for each D NW , and σ V th was the smallest at a median D NW of 9 nm. To analyze the observed D NW tendency of σ V th , a novel modeling approach based on the error propagation law was proposed. The contribution of gate-metal work function, channel dopant concentration ( N ch ), and D NW variations (WFV, ∆ N ch , and ∆ D NW ) to σ V th were evaluated by directly fitting the developed model to measured σ V th . As a result, WFV induced by metal gate granularity increased as channel area increases, and the slope of WFV in Pelgrom plot is similar to that of σ V th . As D NW decreased, SNWFETs became robust to ∆ N ch but vulnerable to ∆ D NW . Consequently, the contribution of ∆ D NW , WFV, and ∆ N ch is dominant at D NW of 7 nm, 9 nm, and 12, respectively. The proposed model enables the quantifying of the contribution of various variation sources of V th variation, and it is applicable to all SNWFETs with various L G and D NW .