Heterojunction annealing is widely used to improve the efficiency of kesterite thin-film solar cells. However, the efficiency will decrease when the annealing temperature is high, and the reason why high-temperature postdeposition annealing results in the deterioration of device performance is not well-studied, which restricts the efficiency promotion of kesterite solar cells. This study investigates the effect of high-temperature postdeposition annealing on the p-n heterojunction and, thus, on the performance of the solar cell. The surface potential of the absorber layer inverts, the number of deep-level defects increases, and the CdS/CZTSe interface barrier height increases after high-temperature postdeposition annealing. A combination of different characterization methods reveals that excessive elemental diffusion at the p-n heterojunction during high-temperature postdeposition annealing is the key reason for deterioration of the performance of CZTSe devices. This study discloses the mechanism for the change in device properties with high-temperature postdeposition annealing and will also be helpful for understanding the mechanism of efficiency change as the solar cell keeps working.