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Synaptic Segmented Transistor with Improved Linearity by Schottky Junctions and Accelerated Speed by Double-Layered Nitride.

Seong-Yeon KimJi-Man YuGi Sung LeeDae-Hwan YunMoon-Seok KimJin-Ki KimDa-Jin KimGeon-Beom LeeMyung-Su KimJoon-Kyu HanMyungsoo SeoYang-Kyu Choi
Published in: ACS applied materials & interfaces (2022)
Neuromorphic devices have been extensively studied to overcome the limitations of a von Neumann system for artificial intelligence. A synaptic device is one of the most important components in the hardware integration for a neuromorphic system because a number of synaptic devices can be connected to a neuron with compactness as high as possible. Therefore, synaptic devices using silicon-based memory, which are advantageous for a high packing density and mass production due to matured fabrication technologies, have attracted considerable attention. In this study, a segmented transistor devoted to an artificial synapse is proposed for the first time to improve the linearity of the potentiation and depression (P/D). It is a complementary metal oxide semiconductor (CMOS)-compatible device that harnesses both non-ohmic Schottky junctions of the source and drain for improved weight linearity and double-layered nitride for enhanced speed. It shows three distinct and unique segments in drain current-gate voltage transfer characteristics induced by Schottky junctions. In addition, the different stoichiometries of Si x N y for a double-layered nitride is utilized as a charge trap layer for boosting the operation speed. This work can bring the industry potentially one step closer to realizing the mass production of hardware-based synaptic devices in the future.
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