Wafer-Scale, Conformal, and Low-Temperature Synthesis of Layered Tin Disulfides for Emerging Nonplanar and Flexible Electronics.
Jung Joon PyeonIn-Hwan BaekWoo Chul LeeHansol LeeSung Ok WonGa-Yeon LeeTaek-Mo ChungJeong Hwan HanSeung-Hyub BaekJin-Sang KimJi-Won ChoiChong-Yun KangSeong Keun KimPublished in: ACS applied materials & interfaces (2020)
Two-dimensional (2D) metal dichalcogenides have drawn considerable interest because they offer possibilities for the implementation of emerging electronics. The emerging electronics are moving toward two major directions: vertical expansion of device space and flexibility. However, the development of a synthesis method for 2D metal dichalcogenides that meets all the requirements remains a significant challenge. Here, we propose a promising method for wafer-scale, conformal, and low-temperature (≤240 °C) synthesis of single-phase SnS2 via the atomic layer deposition technique. There is a trade-off relationship between the crystallinity and orientation preference of SnS2, which is efficiently eliminated by the two-step growth occurring at different temperatures. Consequently, the van der Waals layers of the highly crystalline SnS2 are parallel to the substrate. Thin-film transistors (TFTs) comprising the SnS2 layer show reasonable electrical performances (field-effect mobility: ∼0.8 cm2 V-1 s-1 and on/off ratio: ∼106), which are comparable to that of a single-crystal SnS2 flake. Moreover, we demonstrate nonplanar and flexible TFTs to identify the feasibility of the implementation of future electronics. Both the diagonal-structured TFT and flexible TFT fabricated without a transfer process show electrical performances comparable to those of rigid and planar TFTs. Particularly, the flexible TFT does not exhibit substantial degradation even after 2000 bending cycles. Our work would provide decisive opportunities for the implementation of future electronic devices utilizing 2D metal chalcogenides.