Nanotube Alignment Mechanism in Floating Evaporative Self-Assembly.
Katherine R JinkinsJason ChanGerald J BradyKjerstin K GronskiPadma GopalanHarold T EvensenArganthaël BersonMichael S ArnoldPublished in: Langmuir : the ACS journal of surfaces and colloids (2017)
The challenge of assembling semiconducting single-wall carbon nanotubes (s-SWCNTs) into densely packed, aligned arrays has limited the scalability and practicality of high-performance nanotube-based electronics technologies. The aligned deposition of s-SWCNTs via floating evaporative self-assembly (FESA) has promise for overcoming this challenge; however, the mechanisms behind FESA need to be elucidated before the technique can be improved and scaled. Here, we gain a deeper understanding of the FESA process by studying a stationary analogue of FESA and optically tracking the dynamics of the organic ink/water/substrate and ink/air/substrate interfaces during the typical FESA process. We observe that the ink/water interface serves to collect and confine the s-SWCNTs before alignment and that the deposition of aligned bands of s-SWCNTs occurs at the ink/water/substrate contact line during the depinning of both the ink/air/substrate and ink/water/substrate contact lines. We also demonstrate improved control over the interband spacing, bandwidth, and packing density of FESA-aligned s-SWCNT arrays. The substrate lift rate (5-15 mm min-1) is used to tailor the interband spacing from 90 to 280 μm while maintaining a constant aligned s-SWCNT bandwidth of 50 μm. Varying the s-SWCNT ink concentration (0.75-10 μg mL-1) allows the control of the bandwidth from 2.5 to 45 μm. A steep increase in packing density is observed from 11 s-SWCNTs μm-1 at 0.75 μg mL-1 to 20 s-SWCNTs μm-1 at 2 μg mL-1, with a saturated packing density of ∼24 s-SWCNTs μm-1. We also demonstrate the scaling of FESA to align s-SWCNTs on a 2.5 × 2.5 cm2 scale while preserving high-quality alignment on the nanometer scale. These findings help realize the scalable fabrication of well-aligned s-SWCNT arrays to serve as large-area platforms for next-generation semiconductor electronics.