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J-MISFET Hybrid Dual-Gate Switching Device for Multifunctional Optoelectronic Logic Gate Applications.

Si Eun YuHan Joo LeeMin-Gu KimSeongil ImYoung Tack Lee
Published in: ACS nano (2024)
High-performance and low operating voltage are becoming increasingly significant device parameters to meet the needs of future integrated circuit (IC) processors and ensure their energy-efficient use in upcoming mobile devices. In this study, we suggest a hybrid dual-gate switching device consisting of the vertically stacked junction and metal-insulator-semiconductor (MIS) gate structure, named J-MISFET. It shows excellent device performances of low operating voltage (<0.5 V), drain current ON/OFF ratio (∼4.7 × 10 5 ), negligible hysteresis window (<0.5 mV), and near-ideal subthreshold slope (SS) (60 mV/dec), making it suitable for low-power switching operation. Furthermore, we investigated the switchable NAND/NOR logic gate operations and the photoresponse characteristics of the J-MISFET under the small supply voltage (0.5 V). To advance the applications further, we successfully demonstrated an integrated optoelectronic security logic system comprising 2-electric inputs (for encrypted data) and 1-photonic input signal (for password key) as a hardware security device for data protection. Thus, we believe that our J-MISFET, with its heterogeneous hybrid gate structures, will illuminate the path toward future device configurations for next-generation low-power electronics and multifunctional security logic systems in a data-driven society.
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